MP29439-A

MP29439-A

Quad-Loop, Digital Multi-Phase Controller

Parameters 概要

出力レールの数
4
フェーズ数
9
VCC（最小）（V）
3.15
VCC（最大）（V）
3.4
Iq (typ) (mA)
30
Ishutdown (typ) (mA)
0.15
fsw（最小）（kHz）
10
fsw（最大）（kHz）
1000
インターフェイス
AVSBus, PMBus/I2C, SVI3, SVID
プロセッサタイプ
SVI3-Based Processors, VR13, VR13HC, VR14, VR14.Cloud
パッケージ（mm）
QFN-52 (6x6)
グレード
Catalog

The MP29439-A is a 9-phase, 4-loop multi-phase controller that is compliant with VR14.Cloud, IMVP9.3, SVI3 rev. 3.1 and rev. 2.0, and AVSBus rev. 1.4 and rev. 2.1 specs. The device works with MPS and multiple vendors’ DrMOS products to provide a multi-phase voltage regulator (VR) total solution with minimal external components. It can be configured up to 9-phase operation for rail 1, 8-phase operation for rail 2, 5-phase operation for rail 3, and 2-phase operation for rail 4.

The MP29439-A provides on-chip non-volatile memory (NVM) to store and restore device configurations. Device configurations and fault parameters are easy to configure or monitor by using the PMBus/I²C interface. The MP29439-A can monitor and report the output current (I_OUT) through the current-sense (CS) output from DrMOS products.

The MP29439-A is based on a unique, digital, multi-phase nonlinear control to provide fast transient response to load transients with minimal output capacitors. With only one power loop control method for both steady state and load transients, power loop compensation is very easy to configure.

The MP29439-A is available in a QFN-52 (6mmx6mm) package.

機能と利点

9-Phase, Quad-Loop Digital Controller
Compliant with VR14.Cloud, SVI3 Rev. 3.1 and Rev. 2.0, AVSBus Rev. 1.4 and Rev. 2.1, and IMVP9.3 Specs
PMBus/I²C Compliant
Switching Frequency (f_SW) Up to 3MHz
Multi-Configuration via Pin Strapping
Built-In Non-Volatile Memory (NVM) to Store Custom Configurations
Minimal External Components
Overshoot Reduction with Nonlinear Control
Flexible Phase Assignment for Triple Rails
Automatic Phase-Shedding (APS) to Improve Overall Efficiency
Phase-to-Phase Active Current Balancing with Configurable Offsets for Thermal Balance
Digital Load Line Regulation
DrMOS Fault Detection and Fault Auto-Recording to the NVM
Supports Overclocking Mode
Line-Float Detection
Standby Mode to Save Power
Input Voltage (V_IN), Output Voltage (V_OUT), Current, Power, and Regulator Temperature Monitoring
Under-Voltage Lockout (UVLO), Over-Voltage Protection (OVP), Under-Voltage Protection (UVP), Over-Current Protection (OCP), Under-Current Protection (UCP), Over-Temperature Protection (OTP), and Reverse-Voltage Protection (RVP) with Options of No Action, Latch, Retry, or Hiccup Mode
Enhanced Register Map Read/Write Protection for Improved Security
Available in a RoHS Compliant QFN-52 (6mmx6mm) Package