CPU コア (コントローラー)

優れた効率
デジタル COT (constant on time)
コントロールと高速 
過渡応答特性
デジタル Ramp
シングルコントロール
パラメータ

高効率
ダイナミック電流バランス 

参照表示列
ステータス
Number of Output Rail
Number of Phases
VCC (min) (V)
VCC (max) (V)
Iq (typ) (mA)
Ishutdown (typ) (mA)
fsw (min) (kHz)
fsw (max) (kHz)
Interfaces
Processor Type
Package
Grade
MPL
Number of Output Rail
Number of Phases
VCC (min) (V)
VCC (max) (V)
Iq (typ) (mA)
Ishutdown (typ) (mA)
fsw (min) (kHz)
fsw (max) (kHz)
Interfaces
Processor Type
Package
Grade
200
100
10
30
20
1
7
PMBUs
PWM-VID
AVSBUS
SVID
PVID
SVI2
NVIDIA Open Vreg
CPU/GPU
ASIC
VR13.HC/IMVP9
AMD SVI2
VR12.5
QFN-40 (5x5)
QFN-48 (6x6)
カタログ
Has MPL
MP2853
新規

Dual-Loop, Digital, Multi-Phase Controller with PMBusTM Interface for AMD SVI2

2 5 3 3.6 34 0.11 200 3000 PMBUs, PVID, SVI2 AMD SVI2 QFN-40 (5x5) Catalog 0
MP2884A
新規

Digital, Multi-Phase PWM Controller with PMBus and PWM-VID

1 4 3 3.6 30 0.15 200 5000 PMBUs, PWM-VID NVIDIA Open Vreg, CPU/GPU, ASIC QFN-40 (5x5) Catalog 0
MP2886A
新規

Digital, Multi-Phase PWM Controller with PMBus and PWM-VID

1 6 3 3.6 30 0.15 200 5000 PMBUs, PWM-VID NVIDIA Open Vreg, CPU/GPU, ASIC QFN-40 (5x5) Catalog 0
MP2888A
新規

Digital, Multi-Phase PWM Controller with PMBus and PWM-VID

1 10 3 3.6 30 0.15 200 5000 PMBUs, PWM-VID NVIDIA Open Vreg, CPU/GPU, ASIC QFN-40 (5x5) Catalog 0
MP2965
新規

Dual-Loop, Digital, Multi-Phase Controller with PMBus Interface for VR13.HC/AVSBUS

2 7 3 3.6 30 0.15 200 3000 PMBUs, AVSBUS, SVID, PVID VR13.HC/IMVP9 QFN-48 (6x6) Catalog 0
MP2953B
新設計には使用不可

6-Phase Digital Multi-Phase Controller With PMBus interface for VR12.5

1 6 4.5 5.5 16 1 200 1000 PMBUs, SVID VR12.5 QFN-40 (5x5) Catalog 0
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